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Reduced Instruction Set Computer

 
 
Reduced Instruction Set Computer (RISC) A whose design is based on the rapid execution of a sequence of simple instructions rather than on the provision of a large variety of complex instructions (as in a ). Features which are generally found in RISC designs are uniform instruction encoding (e.g. the is always in the same bit positions in each instruction which is always one word long), which allows faster decoding; a homogenous , allowing any register to be used in any context and simplifying design; and simple s with more complex modes replaced by sequences of simple arithmetic instructions. Examples of (more or less) RISC processors are the , , , , , and . 's first RISC computer was the (), they now produce the RISC-based and lines. Despite 's bogus claims for their -based es, the first RISC processor used in a was the (ARM) used in the . (1997-06-03)
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